Robert Triggs / Android Authority
Ever since Google switched to custom Tensor chips in the Pixel series, some have complained about mediocre battery life and poor heat dissipation. This is largely due to Google’s decision to have Samsung (and more specifically its S.LSI division) handle many parts of the chip creation process, including manufacturing. Simply put, Samsung’s modern process nodes typically perform less well than rival TSMC’s process nodes.
Fortunately, Google will soon right that mistake by eliminating Samsung and designing future chips in-house. So, as we confirmed earlier, Google will also finally switch to TSMC. However, there was one thing that was unclear about it. It was a question of exactly what process would be used. Today, we can answer that question for Tensor G6 as well as Tensor G5 on Pixel 10.
Thanks to an unprecedented leak from Google’s gChips division. Android permissions We have viewed authoritative documents confirming a new process node for Google’s upcoming chips.
No 2nm but still a nice upgrade
Google Tensor G5 (codenamed “laguna”), which is likely to be the chip for next year’s Pixel 10 series, will be manufactured on TSMC’s 3nm class N3E. This is the exact same process node that Apple uses for the iPhone 16 Pro’s A18 Pro and its M4. Chips. This is because it is probably the best process node currently available and is certainly a significant upgrade in both efficiency and performance over Samsung’s 4nm class 4LPE node used in Tensor G4. Great news!
But perhaps the more interesting part of this leak is the fact that the 2026 Tensor G6 (codenamed “malibu”) will be manufactured on TSMC’s upcoming N3P node, the same one rumored to be used for Apple’s A19 chip. is. It’s still a 3 nm class node, but with some improvements. The document we reviewed included a graph summarizing the changes. Unable to share original page. However, I recreated it as below.
This may be a little confusing, so let me explain a little more. PPA stands for “Power, Performance, Area” which are the three main components of a process node. The 5% improved “Freq (@iso-lkg)” number depends on other characteristics of the chip (in this case leakage, the concept is too complex to explain here). The second figure is “Power (@iso-freq)” and shows how much power usage can be reduced if the frequency remains the same (7% in this case). It is important to know that these two values are not additive, but rather an improvement in frequency or power usage. The last value (‘Area’) tells you how small the finished ship can be (4% in this case).
To summarize, Tensor G6 will also include significant improvements to the process node, even if it’s not 2nm as previously rumored.
The use of both of these process nodes shows that Google is serious about its upcoming Tensor chips. Previous generations have always lagged behind in terms of the technology they use, and using the latest process nodes is definitely a good step towards becoming more competitive.
This is the first part of a series explaining the big Pixel leak. We will continue to release more information, so please look forward to it!
